Transceiver circuits often employ phase locked loops (PLLs) as frequency synthesizers to provide local oscillator (LO) signals for the frequency conversion (mixing) operations involved in transmitting modulated data and demodulating received data, in addition to use in general clock generation circuits.
Frequency synthesisers have been developed in recent years that permit direct modulation of a carrier signal generated by a Phase Locked Loop (PLL) circuit by rapidly varying the instantaneous value of a variable divider forming part of the PLL circuit. The variable divider is controlled by a digital signal output from a sigma-delta type multi-accumulator digital circuit, which acts to shape the noise generated by such a system. Noise is primarily generated at higher frequencies where it can be more easily filtered out (by the natural Low Pass Filter behavior of a closed-loop phase locked loop (PLL)) before transmission of the signal. Such frequency synthesisers are known as direct modulation multi-accumulator fractional-N synthesisers and examples of such a synthesiser is described in U.S. Pat. Nos. 5,166,642 and 5,021,754.
Many types of PLL exist, one widely used PLL circuit being the fractional-N synthesizer incorporating sigma-delta techniques. A structure of a known fractional-N PLL 100 is shown in FIG. 1. The fractional-N PLL circuit 100 consists of a reference frequency (often generated by a crystal oscillator), a phase detector 101, a loop filter 102, a voltage controlled oscillator (VCO) 103, a programmable feedback divider 104, and a sigma-delta modulator 105. A function of the sigma-delta modulator 105 is to control an average divide ratio of the feedback divider 104 to allow frequencies to be synthesized that are not integer multiples of the phase detector operating frequency. This allows the PLL to be designed to have wider bandwidth, faster settling time and exhibit lower noise levels.
The sigma-delta modulator 105 introduces quantization noise in the loop. This quantization noise is shaped by the design of the sigma-delta modulator 105, such that in-band noise is usually moved to higher frequencies. Thus, one of the design considerations for the loop filter is attenuation of the quantization noise at higher frequencies.
The transfer function of the PLL may be represented by:
                                          θ            VCO                                θ            ref                          =                  N                      1            +                          s                                                K                  PD                                ⁢                                                      H                    LF                                    ⁡                                      (                    s                    )                                                  ⁢                                  (                                                            K                      V                                        N                                    )                                                                                        [        1        ]            where:                KPD is the gain of the phase detector,        HLF(s) is the transfer function of the loop filter,        KV is the gain of the VCO, and        1/N is the transfer function of the feedback divider.        
It can be seen that if KPD is fixed, and pole locations of the loop filter are also fixed, then the dynamics and noise performance of the loop will vary as both KV and N vary with frequency.
The known prior art has countered this phenomenon by making KPD programmable depending on the frequency being synthesized. While this option readily lends itself to charge pump based designs, it is not an attractive option for other types of phase detector—for example the voltage mode XOR, where the gain is given by VDD/π, where Vdd is the supply voltage. Here the available output voltage range would be significantly compromised if, say, VDD was made programmable in an analogous fashion.
A structure of a widely used band-switched VCO 200 is shown in FIG. 2. The band-switched VCO 200 consists of a parallel connection of an amplifier 201, inductor 202, digitally tuned capacitor back 203, analogue tuning line voltage controlled capacitor 204, modulation voltage controlled capacitor 205 (if provided), and fixed capacitance 206, which represents parasitic and loading capacitances present in the circuit. Sufficient performance is achieved with this and similar topologies in standard CMOS technologies to provide competitive low cost solutions for mobile handsets serving the Global System for Mobile communications (GSM) and third generation (3G) cellular phone markets, for example.
The frequency of oscillation is well approximated by:
                    ω        =                  1                                    L              ·              C                                                          [        2        ]            where:                ω is the frequency of oscillation,        L is the tank inductance, and        C is the total tank capacitance.        
Capacitive varactor elements 210 are typically employed so that control of the applied voltage to the varactor can be used to adjust the oscillation frequency, as it is difficult to produce variable inductance in standard processes without degrading a quality factor, and hence impacting performance. The varactor structure may take several forms, an example of which is the MOS capacitor, the capacitance of which may be continuously varied from a maximum value when the device is in accumulation mode, to a minimum capacitance value when the device is operating in a depletion region. Thus, capacitance is a function of the applied bias voltage, and hence oscillation frequency is a function of this applied voltage.
The sensitivity of oscillation frequency to this control voltage is KV, and may be expressed as:
                              K          V                =                                            ∂              ω                                      ∂                              V                Tune                                              =                                    -                                                                    ω                    3                                    ⁢                  L                                2                                      ·                                          ∂                                  C                  Tune                                                            ∂                                  V                  Tune                                                                                        [        3        ]            where:                CTune represents a portion of the tank capacitance that is controlled by the PLL tuning line voltage, VTune.        
By employing digitally tuned band-switching techniques, the PLL loop filter operating point may be set to be very close to a desired voltage, say a mid range value. At this mid range tuning line voltage, it can be seen that KV varies as a cube of oscillation frequency as one moves from band to band, and this causes variations in dynamics and noise performance of the conventional PLL incorporating such a VCO across the tuning range.
An example of a known fractional-N PLL, in a transmit portion of a transceiver device 300, is shown in FIG. 3. The fractional-N PLL consists of crystal reference 301, phase detector 302, loop filter 303, voltage controlled oscillator 304 with tuning line voltage 350, modulation port 351 and digital tuning port 352, programmable feedback divider 305, sigma-delta modulator 306, digital-to-analogue converter 310, frequency divider 320, mixer 321, power amplifier 370, antenna switch/duplexer 330, antenna 331 and receiver 360. This configuration is well known in the art and will therefore not be described further here.
Digital data for transmission is added to an input of a sigma-delta modulator 306, which controls the fractional-N divide value. The overall transfer function from the input of the sigma-delta modulator 306 to an output of the VCO, is low-pass in nature, and, especially for digital modulation schemes requiring wide bandwidths, the low-pass nature of this response will tend to attenuate and distort higher frequency components of the transmit data.
Whilst it is desirable to widen the bandwidth of the loop to counter this effect, it is not always practical to do so, as it would reduce rejection of fractional-N quantization noise, as well as exhibiting other undesirable effects.
One known solution to this problem also illustrated in FIG. 3, is to pass the higher frequency components of the transmit data to an output of the VCO 304 via an additional tuning port in the VCO—commonly referred to as the modulation port 351. With knowledge of the loop parameters and transfer functions, appropriate signal processing on the transmit data can be performed in the digital domain, such that the combined effect of the two paths produces the required phase modulation at the output of the VCO 304. Amplitude modulation (AM) may be added (depending on the modulation scheme) via AM path 353 and mixer 321.
Now, referring back to FIG. 2 with the additional modulation port varactors 205 present, modulation port sensitivity may be defined as:
                              K          Mod                =                                            ∂              ω                                      ∂                              V                Mod                                              =                                    -                                                                    ω                    3                                    ⁢                  L                                2                                      ·                                          ∂                                  C                  Mod                                                            ∂                                  V                  Mod                                                                                        [        4        ]            where:                KMod is the modulation port gain, and        CMod is the portion of the tank capacitance controlled by the modulation port voltage, VMod. Note that this expression has the same form as equation [3], arising from the similar varactor tuning mechanism.        
This modulation port gain varies as the cube of frequency, and its value is a key parameter for the application of additional VCO frequency/phase modulation and its resulting fidelity
Thus, a need exists for an improved wireless communication unit, an integrated circuit comprising a frequency generation circuit and method of operation therefor.